Virtual CPU Op-Codes

* Every instruction is on a 4-byte boundary, easier for searching (Code_Index = 0 means the first instruction, 4 = second, etc)
* An instruction (usually) consistes of 3 things: [OpCode Type Value]

* Type List:
* Type Examples
* [ u = unsigned / s = signed , #bytes ]

# Name Arguments Description
0 Bad ????? A test for errors
1 Jump Type [u1] Address [s2] Move the program execution to this address
2 JumpIf Type [u1] Address [s2] Same as above if (Register != 0)
3 Push Type [u1] Value [s2] Push Whatever onto the stack
4 Pop Type [u1] Value [s2] Pop one value off the stack into Whatever
5 Load Type [u1] Value [s2] Load Whatever into Register
6 Mov Type [u1] Value [s2] This time moves Register into Whatever
7 Add Type [u1] Value [s2] Register += Whatever
8 Sub Type [u1] Value [s2] Register -= Whatever
9 Mul Type [u1] Value [s2] Register *= Whatever
10 Div Type [u1] Value [s2] Register /= Whatever
11 Mod Type [u1] Value [s2] Register %= Whatever
12 Shl Type [u1] Value [s2] Register <<= Whatever
13 Shr Type [u1] Value [s2] Register >>= Whatever
14 And Type [u1] Value [s2] Register &= Whatever
15 Or Type [u1] Value [s2] Register |= Whatever
16 Xor Type [u1] Value [s2] Register ^= Whatever
17 Lt Type [u1] Value [s2] Register = (Register < Whatever)
18 Gt Type [u1] Value [s2] Register = (Register > Whatever)
19 Eq Type [u1] Value [s2] Register = (Register == Whatever)
20 Inv Type [u1] Value [s2] Negate bits
21 Label Zero [u1] Label ID [s2] For debugging purposes
22 Rand Type [u1] Value [s2] Put a random number into Whatever
23 Yield Zero [s3] Return control to main process